Espressif’s ESP32-P4 revision 3.0 and greater converts pin 54 of the chip from NC (non-connected) to a power rail (VDD_HP_1), requires a few extra passives, and an updated firmware. Espressif Systems first unveiled the 400 MHz ESP32-P4 dual-core RISC-V SoC in January 2023, and the official ESP32-P4-Function-EV development board was launched in August 2024, with commercial solutions slowly ramping up last year. You’d think the silicon and related hardware would now be frozen, but apparently not. The pin 54 was likely converted from NC (not connected) to VDD_HP_1 to improve the stability of the high-performance digital domain. The old revisions 1.0, 1.1, and 1.3 are not recommended for new designs, and the company advises people to use revision 3.0 or 3.1. They also provided updated reference schematics with the following key changes: The main differences between chip revisions v1.0/v1.3 (not recommended for new designs) and v3.0 and later versions include […]
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Read more here: https://www.cnx-software.com/2026/03/23/esp32-p4-revision-3-0-gains-new-power-rail-requires-new-pcb-design-and-firmware/
